Events

To Be RESCHEDULED - Stay Tuned!
(formerly June 20, 2024)
Join AMD for a live webinar

This webinar consists of two parts, each addressing crucial aspects of the ROCm ecosystem.

In the first part, we'll explore the recent updates introduced in ROCm 6.0.x and analyze the performance implications of transitioning from ROCm 5.7 to ROCm 6.0, specifically focusing on the CDNA2 architecture for a few real-world applications. Given that ROCm 6.0.x enhancements are primarily aimed at bolstering support for CDNA3 and RDNA3 architectures, we'll also introduce the MI300X and MI300A GPU architectures. Additionally, we'll delve into potential nuances related to memory management, particularly important when working with MI300A accelerated processing units (APUs).

In the second part, we'll delve into HIP and its significance within the ROCm ecosystem. Through a historical lens, we'll trace the evolution of ROCm concerning HIP and AMD's various compiler aliases, elucidating the tooling provided to facilitate portability of HPC applications across GPUs from diverse vendors.

• Updates for ROCm 6.0.0 and 6.0.2 related to MI300 support and changes to supported operating systems and GPUs.

• Compare CDNA2 and CDNA3 architecture in addition to APU (MI300A) and discrete GPU (MI300X) architectures with an emphasis on memory spaces.

• Discuss compilers provided by ROCm for AMD GPUs and the relationship to HIP as a portability layer for multiple vendor GPUs.